The Efika 5200B is a low-power, high-performance motherboard based around the Freescale MPC5200B Power Architecture™ System-on-Chip. The MPC5200B includes an internal I/O and DMA controller ('BestComm'), and many configurable inputs and outputs. Most of these have been exposed on the Efika. The DDR SDRAM controller operates at 266MHz (133x2) and on the retail Efika has 128MB populated on-board.
This page aims to expand on the peripheral and IO support of the board, along with hints to documentation on the various components for Operating System and Software developers.
Efika models currently exist running two versions of the "1.3" Open Firmware.
The firmware marked with built-on date of "20070122" was used for all production runs after this date. This Firmware Update has been released to bring all current Efika models to a common firmware version. The update is recommended for all systems running Open Firmware version "1.3" with an /openprom/built-on property of "20061107".
The only user-facing change is automatic enabling of the internal AC97 bus.
Instructions: Extract the ZIP archive to a suitable boot device such as a USB drive. Simply boot the update file from the firmware "ok" prompt:
The MPC5200B interrupt controller is part of the "System Integration Unit". It is not strictly CHRP-compliant but it is well documented in the MPC5200B User's Manual chapter 7.
The MPC5200B ATA controller conforms to the ATA-4 specification and is exposed on a right-angle (L-shape) 44-pin connector intended for direct connection of 2.5" notebook disks. Due to length restrictions and sharing of IO pins on the SoC, it is not recommended to extend the connector with cabling. DMA to the ATA controller is handled by the integrated BestComm DMA controller.
This component is documented in the MPC5200B Users Manual, Chapter 11.
Provides a dual-speed (10Mbit/s and 100Mbit/s) auto-switching Ethernet connection for twisted pair (UTP) cable types. It is connected to a standard Realtek RTL8201CL MII PHY. Utilizing the Ethernet Controller requires support for the BestComm DMA controller - CPU handling of Ethernet is not supported.
This component is documented in the MPC5200B Users Manual, Chapter 14.
The MPC5200B implements an OHCI-compliant USB host controller operating at data rates of up to 12Mbit/s. The EFIKA implements 2 ports on the back panel.
This component is documented in the MPC5200B Users Manual chapter 12.
Efika provides line-out, line-in and microphone-in connections via standard 3.5" RCA connectors. Further AUX, VIDEO, MIC-IN, MODEM connectors are provided via 'Sony' CDROM audio connectors on the PCB. It is controlled via PSC2.
The IDT (formerly Sigmatel) STAC9766 codec also provides a full mixer, '3D' sound expansion and an optical digital audio output (S/PDIF). Full documentation for this codec is readily available online.
The Efika includes a 66MHz 3.3V-keyed PCI slot. With the bundled 90° riser, standard graphics cards can also be used. The PCI bus supports only a single device, so if multiple PCI cards are desired, a bridged riser card must be used to provide the correct signalling. Connecting 5V PCI adapters (which may be mistakenly keyed as "universal" for 3.3V and 5V operation) may damage your Efika. Please be wary of PCI card specifications.
Efika provides a standard D-sub RS232 serial port on PSC1. It has a maximum configurable baud rate of 1 Mbit/s, although some driver software enforces PC-style baud-rate limitations.
PSC3, PSC4 and PSC5 are used for Ethernet and USB functionality. Do not attempt to reconfigure these controllers for other purposes.
PSC6 of the MPC5200B is exposed as a [url=http://www.hardwarebook.info/Motherboard_IrDA]standard 5-pin 'IrDA' connector[/url] on the Efika motherboard. Pin 1 is closest to the back of the board. However, it can be altered in function through software, by changing the settings of the PSC. Available features are 3 IrDA modes (SIR/MIR/FIR), UART (TX/RX only), I2S 'codec' mode, and GPIO (2 GPIO with Wake-Up and 1 simple GPIO). Ground and 3.3V power are present on this connector.
Configuring the PSCs is documented in the MPC5200B Users Manual chapter 7 (GPIO/IrDA/CODEC mode selection) and individual mode operation is documented in chapter 15.
The internal CAN bus is exposed via 2 solder pads on the reverse of the Efika 5200B. A 9x9 solder pad with voltage and ground connections is available for mounting CAN PHYs and other components for development. The MS-CAN bus is documented in the MPC5200B Users Manual chapter 19.