http://www.guardian.co.uk/technology/bl ... s-netbooks
ARM has announced the first processor that it has optimised for performance rather than power-saving operation, which Eric Schorn, vice president of marketing in the processor division, says "is a huge departure from what we've done in the past. We've kind of taken off the handcuffs."http://www.arm.com/news/25922.html
ARM expects the dual-core version of the Cortex-A9 to run at 2GHz and above, which will be suitable for use in smartbooks or netbooks in 2011. The chip may also be used in TV sets, printers and other products.
There will also be a power-optimised version of the chip running at 800MHz, which will consume less power (0.5W instead of 1.9W). However, ARM estimates that even the 2GHz part should provide at least twice the battery life of an Intel Atom chip.
Both chips are scheduled for fabrication using TSMC's 40nm-G process.
Schorn says the A9 is "roughly one third of the size of an Atom, and that translates into cost. So we believe our solutions will have a significant cost advantage in the marketplace."
Intel used to sell its own StrongARM chip and developed the ARM-compatible XScale processor before selling off the business in favour of its own new design, the Atom. This has rapidly become the standard on netbooks, and Intel is further reducing the power consumption to get it into smaller devices -- including mobile phones. With ARM moving up and Intel moving down, the two companies will end up fighting it out in the marketplace.
ARM's problem is that the Cortex chip doesn't run what Schorn calls "big Windows," which provides access to a huge range of standard software and peripherals. ARM-based netbooks will have to run alternatives such as Google Android, Windows CE or Windows Mobile, Ubuntu and other versions of Linux. "There's a variety of operating systems available," says Schorn.
However, ARM dominates the mobile phone business, so there are thousands of applications written for ARM chips, and some of these could be attractive on smartbooks, netbooks, tablets such as the Archos 5 Internet Tablet and similar devices.
Schorn also argues that there is less need to run "big Windows" software now that users are adopting online applications that work through a browser. How many buyers will agree remains to be seen. Suppliers such as Acer and Asus had high hopes for Linux on netbooks, but ultimately these models failed in the marketplace, after Microsoft made Windows XP available at very low prices.
Still, Schorn says that, with the A9-40G, ARM is bringing diversity to the market, and increasing competiton, "which is a good thing and will benefit the consumer. And for us, it's a move out of wireless and into new areas. That's what it's about."
ARM Announces 2GHz Capable Cortex-A9 Dual Core Processor Implementation
ARM Cortex processor technology and physical IP developed in unison to deliver high performance and low-power processing for consumer and enterprise markets
CAMBRIDGE, UK â€“ Sept. 16, 2009 â€“ ARM [(LSE: ARM); (Nasdaq: ARMH)] announced today the development of two Cortexâ„¢-A9 MPCoreâ„¢ hard macro implementations for the TSMC 40nm-G process, enabling silicon manufacturers to have a rapid and low-risk route to silicon for high-performance, low-power Cortex-A9 processor-based devices. The speed-optimized hard macro implementation will enable devices to operate at frequencies greater than 2GHz.
The dual core hard macro implementations are the result of ARMâ€™s significant investment in advanced physical IP development in unison with processor and fabric IP technology, and leading-edge implementation flows from the EDA industry. Advanced physical IP techniques have enabled critical circuits within the design to be replaced with highly tuned logic cells and memories, increasing performance while lowering overall power consumption.
The Cortex-A9 speed-optimized hard macro implementation will provide system designers with an industry standard ARMÂ® processor incorporating aggressive low-power techniques to further extend ARMâ€™s performance leadership into high-margin consumer and enterprise devices within the power envelope necessary for compact, high-density and thermally constrained environments. This hard macro implementation operates in excess of 2GHz when selected from typical silicon and represents an ideal solution for high-margin performance-oriented applications.
In many thermally constrained applications such as set-top boxes, DTVs, printers and other feature-rich consumer and high-density enterprise applications, energy efficiency is of paramount importance. The Cortex-A9 power-optimized hard macro implementation delivers its peak performance of 4000 DMIPS while consuming less than 250mW per CPU when selected from typical silicon.
The hard macro implementations include ARM AMBAÂ®-compliant high performance system components to maximize data traffic speed and minimize power consumption and silicon area. Each Cortex-A9 hard macro implementation also includes the CoreSightâ„¢ Program Trace Macrocell (PTM) which provides full visibility into the processorâ€™s instruction flow, enabling the software community to develop code for optimal performance.
â€œThe Cortex-A9 MPCore processor has already been widely accepted as the processor of choice for high-performance embedded applications across a broad spectrum of demanding consumer and enterprise devices,â€ said Eric Schorn, VP marketing, Processor Division, ARM. â€œARMâ€™s parallel development of advanced, optimized physical IP components demonstrates a new level of collaborative differentiation while enabling our Partners to expand their penetration into high margin domains traditionally occupied by proprietary architectures.â€
â€œARMâ€™s long-standing investment in low-power leadership and ability to develop such high-performance devices enables licensees to lower the cost and risk of entering the high-margin markets currently addressed with competing proprietary solutions,â€ said Will Strauss, principal analyst at Forward Concepts. â€œWith single-thread performance capable of supporting very intensive workloads, the unprecedented level of power efficiency will enable licensees to introduce compelling new products.â€
â€œARM and TSMC have enjoyed a long standing relationship of collaboration to ensure the development and delivery of best-in-class products optimized for our manufacturing process,â€ said ST Juang, Sr. Director, Design Infrastructure Marketing Division, TSMC. â€œThis provides OEMs developing feature-rich consumer and enterprise devices access to TSMCâ€™s manufacturing excellence and the power of ARM processor IPâ€
Both ARM dual core Cortex-A9 hard macros will share a common seven-power domain, dual-NEONâ„¢ technology configuration supporting SMP (symmetrical multiprocessing) operating systems with up to 8MB of Level2 cache memory and will be delivered with all scripts, vectors and libraries required to integrate the macro directly within any SoC device.
To enable the development of high-efficiency, low risk SoCs using other Cortex-A9 processor configurations, ARM also provides the silicon-proven SoC-level ARM Physical IP platform used to build these hard macros, and a range of AMBA-compliant system development components and tools.
In addition, the ARM Active Assist consulting service, developed in conjunction with the hard macros, enables ARM Partners to efficiently integrate the hardened macro into their SoC design to realize maximum system performance with lowest risk and fastest time-to-market.
The Cortex-A9 hard macros and the corresponding optimized physical IP used to develop the speed-optimized and power-optimized
implementations are available for license today with delivery in the fourth quarter of 2009. ARMâ€™s 40G physical IP platform is also available today at designstart.arm.com.